EU RoHS
|
Compliant with Exemption |
ECCN (US)
|
3A991.a.2 |
Part Status
|
Obsolete |
HTS
|
8542.31.00.01 |
Family Name
|
PowerQUICC III MPC85xx Processor |
Instruction Set Architecture
|
RISC |
Device Core
|
e500 |
Number of CPU Cores
|
1 |
Data Bus Width (bit)
|
32 |
Instruction Cache Size
|
32KB |
Maximum Speed (MHz)
|
800 |
Interface Type
|
I2C/UART |
UART
|
2 |
USART
|
0 |
Data Cache Size
|
32KB |
USB
|
0 |
Multiply Accumulate
|
No |
SPI
|
0 |
I2C
|
2 |
I2S
|
0 |
CAN
|
0 |
Ethernet
|
2 |
Ethernet Interface Type
|
MII/RMII/GMII/RGMII |
Ethernet Speed
|
10Mbps/100Mbps/1000Mbps |
Operating Supply Voltage-Min (V)
|
0.95 |
Typical Operating Supply Voltage (V)
|
1 |
Operating Supply Voltage-Max (V)
|
1.05 |
I/O Voltage (V)
|
3.3 |
Operating Temperature-Min
|
-40 |
Operating Temperature-Max
|
105 |
Supplier Temperature Grade
|
Industrial |
Packing Method
|
Tray |
Original Package
|
FCBGA |
Pin Count
|
783 |
Standard Package Method
|
BGA |
Terminal Form
|
Surface Mount |
Package Height
|
2.2(Max) |
Package Length
|
29 |
Package Width
|
29 |
PCB changed
|
783 |