SIS488DN-T1-GE3

SKU: 80416

Manufacturer: Vishay

Trans MOSFET N-CH Si 40V 40A 8-Pin PowerPAK 1212 EP

11300 parts IN STOCK

Shipped from :

Netherlands

Expected Ships :

Rohs State : Need to verify

Increments of 0 pcs

Products specifications

EU RoHS	Compliant with Exemption
ECCN (US)	EAR99
Part Status	Active
HTS	8541.29.00.95
SVHC	Yes
SVHC Exceeds Threshold	Yes
Automotive	No
PPAP	No
Product Category	Power MOSFET
Body Material	Si
Configuration	Single Quad Drain Triple Source
Process Technology	TrenchFET
Channel Mode	Enhancement
Channel Type	N
Number of Elements per pcs	1
Maximum Drain Source Voltage (V)	40
Maximum Gate Source Voltage (V)	±20
Maximum Gate Threshold Voltage (V)	2.2
Maximum Continuous Drain Current (A)	40
Maximum Gate Source Leakage Current (nA)	100
Maximum IDSS (uA)	1
Maximum Drain Source Resistance (mOhm)	5.5@10V
Typical Gate Charge @ Vgs (nC)	9.8@4.5V
Typical Gate Charge @ 10V (nC)	21.3
Typical Input Capacitance @ Vds (pF)	1330@20V
Maximum Power Dissipation (mW)	3700
Typical Fall Time (ns)	9
Typical Rise Time (ns)	65
Typical Turn-Off Delay Time (ns)	24
Typical Turn-On Delay Time (ns)	22
Operating Temperature-Min	-55
Operating Temperature-Max	150
Maximum Positive Gate Source Voltage (V)	20
Maximum Continuous Drain Current on PCB @ TC=25°C (A)	19.3
Maximum Power Dissipation on PCB @ TC=25°C (W)	3.7
Maximum Junction Ambient Thermal Resistance on PCB (°C/W)	81
Typical Diode Forward Voltage (V)	0.75
Typical Gate Plateau Voltage (V)	2.5
Typical Reverse Recovery Time (ns)	31
Maximum Diode Forward Voltage (V)	1.2
Minimum Gate Resistance (Ohm)	0.2
Maximum Gate Resistance (Ohm)	1.5
Original Package	PowerPAK 1212 EP
Pin Count	8
Standard Package Method	PowerPAK
Terminal Form	Surface Mount
Package Height	1.07(Max)
Package Length	3.05
Package Width	3.05
PCB changed	8

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Products specifications

EU RoHS	Compliant with Exemption
ECCN (US)	EAR99
Part Status	Active
HTS	8541.29.00.95
SVHC	Yes
SVHC Exceeds Threshold	Yes
Automotive	No
PPAP	No
Product Category	Power MOSFET
Body Material	Si
Configuration	Single Quad Drain Triple Source
Process Technology	TrenchFET
Channel Mode	Enhancement
Channel Type	N
Number of Elements per pcs	1
Maximum Drain Source Voltage (V)	40
Maximum Gate Source Voltage (V)	±20
Maximum Gate Threshold Voltage (V)	2.2
Maximum Continuous Drain Current (A)	40
Maximum Gate Source Leakage Current (nA)	100
Maximum IDSS (uA)	1
Maximum Drain Source Resistance (mOhm)	5.5@10V
Typical Gate Charge @ Vgs (nC)	9.8@4.5V
Typical Gate Charge @ 10V (nC)	21.3
Typical Input Capacitance @ Vds (pF)	1330@20V
Maximum Power Dissipation (mW)	3700
Typical Fall Time (ns)	9
Typical Rise Time (ns)	65
Typical Turn-Off Delay Time (ns)	24
Typical Turn-On Delay Time (ns)	22
Operating Temperature-Min	-55
Operating Temperature-Max	150
Maximum Positive Gate Source Voltage (V)	20
Maximum Continuous Drain Current on PCB @ TC=25°C (A)	19.3
Maximum Power Dissipation on PCB @ TC=25°C (W)	3.7
Maximum Junction Ambient Thermal Resistance on PCB (°C/W)	81
Typical Diode Forward Voltage (V)	0.75
Typical Gate Plateau Voltage (V)	2.5
Typical Reverse Recovery Time (ns)	31
Maximum Diode Forward Voltage (V)	1.2
Minimum Gate Resistance (Ohm)	0.2
Maximum Gate Resistance (Ohm)	1.5
Original Package	PowerPAK 1212 EP
Pin Count	8
Standard Package Method	PowerPAK
Terminal Form	Surface Mount
Package Height	1.07(Max)
Package Length	3.05
Package Width	3.05
PCB changed	8