EU RoHS
|
Compliant |
ECCN (US)
|
EAR99 |
Part Status
|
Active |
HTS
|
8542.39.00.01 |
Automotive
|
No |
PPAP
|
No |
Type
|
D-Type |
Logic Family
|
HC |
Latch Mode
|
Addressable |
Number of Channels per Chip
|
8 |
Number of Elements per pcs
|
1 |
Number of Inputs per Chip
|
1 |
Number of Input Enables per Element
|
1 |
Number of Selection Inputs per Element
|
3 |
Number of Outputs per Chip
|
8 |
Number of Output Enables per Element
|
0 |
Bus Hold
|
No |
Set/Reset
|
Master Reset |
Polarity
|
Non-Inverting |
Maximum Propagation Delay Time @ Maximum CL (ns)
|
185@2V |
Absolute Propagation Delay Time (ns)
|
280 |
Process Technology
|
CMOS |
Maximum Low Level Output Current (mA)
|
5.2 |
Maximum High Level Output Current (mA)
|
-5.2 |
Operating Supply Voltage-Min (V)
|
2 |
Typical Operating Supply Voltage (V)
|
5 |
Operating Supply Voltage-Max (V)
|
6 |
Maximum Quiescent Current (uA)
|
4 |
Propagation Delay Test Condition (pF)
|
50 |
Operating Temperature-Min
|
-40 |
Operating Temperature-Max
|
125 |
Packing Method
|
Tape and Reel |
Original Package
|
SOIC |
Pin Count
|
16 |
Standard Package Method
|
SOP |
Terminal Form
|
Surface Mount |
Package Height
|
1.38 |
Package Length
|
10.2(Max) |
Package Width
|
3.9 |
PCB changed
|
16 |