EU RoHS
|
Compliant |
ECCN (US)
|
EAR99 |
Part Status
|
Obsolete |
Automotive
|
No |
PPAP
|
No |
Logic Family
|
F |
Logic Function
|
Latched Transceiver with Parity Checker |
Data Flow Direction
|
Bi-Directional |
Number of Elements per pcs
|
1 |
Number of Channels per Chip
|
8 |
Number of Selection Inputs per Element
|
1 |
Number of Output Enables per Element
|
2 Low |
Number of Input Enables per Element
|
2 High |
Number of Direction Control Inputs
|
0 |
Bus Hold
|
No |
Polarity
|
Non-Inverting |
Absolute Propagation Delay Time (ns)
|
18 |
Maximum Propagation Delay Time @ Maximum CL (ns)
|
17@5V |
Propagation Delay Test Condition (pF)
|
50 |
Process Technology
|
Bipolar |
Input Level
|
TTL |
Output Level
|
TTL |
Output Type
|
3-State |
Maximum Low Level Output Current (mA)
|
64 |
Maximum High Level Output Current (mA)
|
-15 |
Operating Supply Voltage-Min (V)
|
4.5 |
Operating Supply Voltage-Max (V)
|
5.5 |
Operating Temperature-Min
|
0 |
Operating Temperature-Max
|
70 |
Packing Method
|
Rail |
Standard Package Method
|
LCC |
Original Package
|
PLCC |
Pin Count
|
28 |
Terminal Form
|
Surface Mount |
Package Height
|
3.66(Min) |
Package Length
|
11.58(Max) |
Package Width
|
11.58(Max) |
PCB changed
|
28 |