|
EU RoHS
|
Supplier Unconfirmed |
|
ECCN (US)
|
EAR99 |
|
Part Status
|
Obsolete |
|
Automotive
|
No |
|
PPAP
|
No |
|
Logic Family
|
LVC |
|
Logic Function
|
Latched Transceiver |
|
Data Flow Direction
|
Bi-Directional |
|
Number of Elements per pcs
|
1 |
|
Number of Channels per Chip
|
8 |
|
Number of Selection Inputs per Element
|
0 |
|
Number of Output Enables per Element
|
2 Low |
|
Number of Input Enables per Element
|
4 Low |
|
Number of Direction Control Inputs
|
0 |
|
Bus Hold
|
No |
|
Polarity
|
Non-Inverting |
|
Absolute Propagation Delay Time (ns)
|
22.9 |
|
Maximum Propagation Delay Time @ Maximum CL (ns)
|
3.7(Typ)@2.7V |
|
Propagation Delay Test Condition (pF)
|
50 |
|
Process Technology
|
CMOS |
|
Input Level
|
LVTTL |
|
Output Level
|
LVTTL |
|
Output Type
|
3-State |
|
Maximum Low Level Output Current (mA)
|
24 |
|
Maximum High Level Output Current (mA)
|
-24 |
|
Typical Quiescent Current (uA)
|
0.1 |
|
Maximum Quiescent Current (uA)
|
40 |
|
Operating Supply Voltage-Min (V)
|
1.2 |
|
Operating Supply Voltage-Max (V)
|
3.6 |
|
Tolerant I/Os (V)
|
5 |
|
Maximum Power Dissipation (mW)
|
500 |
|
Operating Temperature-Min
|
-40 |
|
Operating Temperature-Max
|
125 |
|
Original Package
|
TSSOP |
|
Pin Count
|
24 |
|
Terminal Form
|
Surface Mount |
|
Package Height
|
0.95(Max) |
|
Package Length
|
7.9(Max) |
|
Package Width
|
4.5(Max) |