TP0606N3-G

SKU: 94720

Manufacturer: Microchip Technology

Trans MOSFET P-CH Si 60V 0.32A 3-Pin TO-92 Bag

10 parts IN STOCK

Shipped from :

Netherlands

Expected Ships :

Rohs State : Need to verify

Increments of 0 pcs

Products specifications

EU RoHS	Compliant
ECCN (US)	EAR99
Part Status	Active
HTS	8541.29.00.95
Automotive	No
PPAP	No
Product Category	Power MOSFET
Body Material	Si
Configuration	Single
Process Technology	VDMOS
Channel Mode	Enhancement
Channel Type	P
Number of Elements per pcs	1
Maximum Drain Source Voltage (V)	60
Maximum Gate Source Voltage (V)	±20
Maximum Gate Threshold Voltage (V)	2.4
Maximum Continuous Drain Current (A)	0.32
Maximum Gate Source Leakage Current (nA)	100
Maximum IDSS (uA)	10
Maximum Drain Source Resistance (mOhm)	3500@10V
Typical Input Capacitance @ Vds (pF)	80@25V
Typical Reverse Transfer Capacitance @ Vds (pF)	15@25V
Minimum Gate Threshold Voltage (V)	1
Typical Output Capacitance (pF)	50
Maximum Power Dissipation (mW)	1000
Typical Fall Time (ns)	15(Max)
Typical Rise Time (ns)	15(Max)
Typical Turn-Off Delay Time (ns)	20(Max)
Typical Turn-On Delay Time (ns)	10(Max)
Operating Temperature-Min	-55
Operating Temperature-Max	150
Packing Method	Bag
Maximum Positive Gate Source Voltage (V)	20
Maximum Pulsed Drain Current @ TC=25°C (A)	3.5
Typical Gate Plateau Voltage (V)	1.7
Typical Reverse Recovery Time (ns)	300
Maximum Diode Forward Voltage (V)	1.8
Original Package	TO-92
Pin Count	3
Standard Package Method	TO-92
Terminal Form	Through Hole
Package Height	5.33(Max)
Package Length	5.21(Max)
Package Width	4.19(Max)
PCB changed	3

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Products specifications

EU RoHS	Compliant
ECCN (US)	EAR99
Part Status	Active
HTS	8541.29.00.95
Automotive	No
PPAP	No
Product Category	Power MOSFET
Body Material	Si
Configuration	Single
Process Technology	VDMOS
Channel Mode	Enhancement
Channel Type	P
Number of Elements per pcs	1
Maximum Drain Source Voltage (V)	60
Maximum Gate Source Voltage (V)	±20
Maximum Gate Threshold Voltage (V)	2.4
Maximum Continuous Drain Current (A)	0.32
Maximum Gate Source Leakage Current (nA)	100
Maximum IDSS (uA)	10
Maximum Drain Source Resistance (mOhm)	3500@10V
Typical Input Capacitance @ Vds (pF)	80@25V
Typical Reverse Transfer Capacitance @ Vds (pF)	15@25V
Minimum Gate Threshold Voltage (V)	1
Typical Output Capacitance (pF)	50
Maximum Power Dissipation (mW)	1000
Typical Fall Time (ns)	15(Max)
Typical Rise Time (ns)	15(Max)
Typical Turn-Off Delay Time (ns)	20(Max)
Typical Turn-On Delay Time (ns)	10(Max)
Operating Temperature-Min	-55
Operating Temperature-Max	150
Packing Method	Bag
Maximum Positive Gate Source Voltage (V)	20
Maximum Pulsed Drain Current @ TC=25°C (A)	3.5
Typical Gate Plateau Voltage (V)	1.7
Typical Reverse Recovery Time (ns)	300
Maximum Diode Forward Voltage (V)	1.8
Original Package	TO-92
Pin Count	3
Standard Package Method	TO-92
Terminal Form	Through Hole
Package Height	5.33(Max)
Package Length	5.21(Max)
Package Width	4.19(Max)
PCB changed	3