|
EU RoHS
|
Compliant |
|
ECCN (US)
|
EAR99 |
|
Part Status
|
Active |
|
HTS
|
8542.31.00.01 |
|
Family Name
|
Z80 |
|
Instruction Set Architecture
|
CISC |
|
Device Core
|
Z80 |
|
Core Architecture
|
Z80 |
|
Maximum CPU Frequency (MHz)
|
6 |
|
Maximum Clock Rate (MHz)
|
6 |
|
Data Bus Width (bit)
|
8 |
|
Program Memory Type
|
ROMless |
|
Programmability
|
No |
|
USART
|
1 |
|
UART
|
1 |
|
USB
|
0 |
|
SPI
|
1 |
|
I2C
|
0 |
|
I2S
|
0 |
|
CAN
|
0 |
|
Ethernet
|
0 |
|
Operating Supply Voltage-Min (V)
|
4.5 |
|
Typical Operating Supply Voltage (V)
|
5 |
|
Operating Supply Voltage-Max (V)
|
5.5 |
|
Operating Temperature-Min
|
-40 |
|
Operating Temperature-Max
|
105 |
|
Original Package
|
PDIP |
|
Pin Count
|
40 |
|
Standard Package Method
|
DIP |
|
Terminal Form
|
Through Hole |
|
Package Height
|
3.94(Max) |
|
Package Length
|
52.58(Max) |
|
Package Width
|
14.22(Max) |
|
PCB changed
|
40 |