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    EPM7256EGC192-12

    SKU: 96515
    Manufacturer: Intel
    CPLD MAX® 7000 Family 5K Gates 256 Macro Cells 90.9MHz CMOS Technology 5V 192-Pin CPGA Tray
    320 parts IN STOCK
    Shipped from :
    Netherlands
    Expected Ships :
    Rohs State : Need to verify

    QUANTITY

    Increments of 0 pcs
    Products specifications
    EU RoHS Compliant
    ECCN (US) EAR99
    Part Status Obsolete
    Automotive No
    PPAP No
    Family Name MAX® 7000
    Program Memory Type EEPROM
    Number of Logic Blocks/Elements 16
    Number of Global Clocks 2
    Number of Macro Cells 256
    Process Technology CMOS
    Product Terms 32
    Device System Gates 5000
    Data Gate No
    Maximum Number of User I/Os 164
    In-System Programmability Yes
    Programmability Yes
    Reprogrammability Support Yes
    Maximum Internal Frequency (MHz) 125
    Maximum Clock to Output Delay (ns) 6
    Maximum Propagation Delay Time (ns) 12
    Speed Grade 12
    Individual Output Enable Control Yes
    Operating Supply Voltage-Min (V) 4.75
    Operating Supply Voltage-Max (V) 5.25
    Typical Operating Supply Voltage (V) 5
    I/O Voltage (V) 3.3
    Operating Temperature-Min 0
    Operating Temperature-Max 70
    Supplier Temperature Grade Commercial
    Packing Method Tray
    Tradename MAX
    Original Package CPGA
    Pin Count 192
    Standard Package Method PGA
    Terminal Form Through Hole
    Package Height 3.61
    Package Length 44.7
    Package Width 44.7
    PCB changed 192
    Products specifications
    EU RoHS Compliant
    ECCN (US) EAR99
    Part Status Obsolete
    Automotive No
    PPAP No
    Family Name MAX® 7000
    Program Memory Type EEPROM
    Number of Logic Blocks/Elements 16
    Number of Global Clocks 2
    Number of Macro Cells 256
    Process Technology CMOS
    Product Terms 32
    Device System Gates 5000
    Data Gate No
    Maximum Number of User I/Os 164
    In-System Programmability Yes
    Programmability Yes
    Reprogrammability Support Yes
    Maximum Internal Frequency (MHz) 125
    Maximum Clock to Output Delay (ns) 6
    Maximum Propagation Delay Time (ns) 12
    Speed Grade 12
    Individual Output Enable Control Yes
    Operating Supply Voltage-Min (V) 4.75
    Operating Supply Voltage-Max (V) 5.25
    Typical Operating Supply Voltage (V) 5
    I/O Voltage (V) 3.3
    Operating Temperature-Min 0
    Operating Temperature-Max 70
    Supplier Temperature Grade Commercial
    Packing Method Tray
    Tradename MAX
    Original Package CPGA
    Pin Count 192
    Standard Package Method PGA
    Terminal Form Through Hole
    Package Height 3.61
    Package Length 44.7
    Package Width 44.7
    PCB changed 192